Good question. You’ll want to use SVUnit if you and your customers value defect free systemverilog code. Simple as that.
The SVUnit framework allows you to easily isolate modules, classes and/or interfaces in your designs and testbenches so you can kill bugs at a granularity that is most productive: the unit test level. It’s good for design and verification engineers. It’s also great for test-driven development if you care enough to prevent defects in the first place.
On the other hand, if your customers like buggy code or you don’t think defect free code is worth the effort, then SVUnit is not for you.
SVUnit Download and Setup
Download to setup is about a 3 minute procedure…
- Download the latest version of SVUnit from sourceforge by clicking the big blue button to the right.
- Extract the SVUnit archive
- Source the SVUnit setup script (bash users source Setup.bsh. csh users source Setup.csh)
Your First SVUnit Project
It’ll take you about another 2minutes to get a new project started…
Check Out the SVUnit Examples For More
For more elaborate examples of what you can do with SVUnit, check out these examples packaged with SVUnit…
- examples/modules/apb_slave – an example for designers. This is a verilog APB slave module being verified with a set of simple read/write accessibility tests.
- examples/uvm/simple_model – for verification engineers building UVM components, simple model is a simple (perfect) reference.
- examples/uvm/uvm_express – this is a more elaborate example of building an UVM agent. You’ll find BFMs, monitors, coverage groups and an agent in this example with unit tests that take about 10 seconds to run. Don’t let the name fool you… uvm_express will help anyone using UVM!
- uvm/uvm_report_mock – learn how to verify your uvm_error and uvm_fatal testbench checkers by using the UVM report mock scoreboarding.