Author Archives: nosnhojn

About nosnhojn

I've been working in ASIC and FPGA development for more than 13 years at various IP and product development companies and now as a consultant with XtremeEDA Corp. In 2008 I took an interest in agile software development. I've found a massive amount of material out there related to agile development, all of it is interesting and most of it is applicable to hardware development in one form or another. So I'm here to find what agile concepts will work for hardware development and to help other developers use them successfully. I've been fortunate to have the chance to speak about agile hardware development at various conferences like Agile2011, Agile2012, Intel Lean/Agile Conference 2013 and SNUG. I also do lunch-n-learn talks for small groups and enjoy talking to anyone with an agile hardware story to tell! You can find me at neil.johnson@agilesoc.com.

Now Is Not The Time To Be Practical

They call them comfort zones for a reason, it’s because they’re comfortable. I don’t like being in my comfort zone because when I get comfortable I fail to recognize when a change is necessary. I start framing uncomfortable change as impractical, then concoct seemingly logical arguments to avoid … Continue reading

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Agile IC Methodology From Sonics

Here’s a marketing video posted yesterday from Sonics about an Agile IC Methodology they’re promoting in the run-up to ARM TechCon. Normally I might not post stuff like this directly on AgileSoC.com but I’m making an exception because one of the people … Continue reading

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Now What?

You’ve started doing TDD or unit testing your systemverilog code with SVUnit, your defect rate is down and you’re producing better code. You’re at the point where your experience could benefit the rest of your team but you’re not sure how to get the point … Continue reading

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Stepping Through an RTL Unit Test

Pretty much every testbench I’ve ever built, used or seen has a free-running clock that’s driven within a while or forever loop. Not much can happen without the clock in a synchronous design so defining the clock logic is usually the first and … Continue reading

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TDD for Design Proof-of-Concept

It’s finally time to see if TDD is a viable technique for writing RTL with verilog. But first, a little backstory… For the Agile2014 conference in Orlando this past summer, Soheil and I built an Agile hardware/software co-development demo using a Xilinx … Continue reading

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Agile Hardware Hangout Schedule

I’ve scheduled a regular agile hardware hangout to run weekly on Wednesday nights. You can either join us from the google group where I’ll post links and updates or you can go directly to the google hangout every wednesday at 7:30pst. Anyone interested in agile … Continue reading

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Agile Hardware Hangout

UPDATE: I’ve started an agile hardware hangout google group. I figured posting hangout links there would be better for keeping people posted on when/where we get a hangout started. Please join the group if you’re interested in this. I often … Continue reading

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SVUnit v3.1 Released

I just posted version 3.1 of SVUnit to sourceforge. If you’ve been waiting patiently for me to get rid of the makefiles, the wait is over. From here on, we’ve got a simple command line script to run SVUnit unit tests … Continue reading

Posted in Functional Verification | Tagged | 4 Comments

Shame On Me (Why I Use Test-driven Development)

When I hear the word shame, there is only one thing that comes to mind: Slapshot. If you’re Canadian, chances are you already know what I’m talking about. To everyone else, Slapshot is a hockey movie and shame comes from an interview … Continue reading

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Agile2014 Conference Report

Heads-up that I just posted my end-of-conference summary of the Agile2014 conference in Orlando. In short, it was a great conference with some very promising signs for agile hardware. You can read my full report here. -neil

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