Tag Archives: svunit

Verilog/VHDL Mixed Language Unit Testing

SVUnit supports mixed language Verilog/VHDL unit testing. Finally. It didn’t take much to do it but for some reason it took me a loooooooong time to get at it. It involves a new switch to the runSVUnit command line. Users can … Continue reading

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One and One Makes Three

-neil PS: Huh??

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Hardware Bugs Need to Die

I used to accept bugs as a part of what happens in hardware development. Start a new project, write a bunch of code, deal with the bugs that inevitably arise, stress out about whether I can fix them before development … Continue reading

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Leading the Discussion on Unit Testing

About a month has passed since the great unit testing discussion in the Verification Academy booth at DAC in Austin. It was my second year in the booth. Very grateful for having had the opportunity. It was a lot of fun! … Continue reading

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SVUnit Moved to GitHub

Heads-up that we’ve moved SVUnit from Sourceforge to GitHub. This move was a long time coming, finally got it done a couple weeks ago. From now on, all new development will take place in the SVUnit GitHub repository. We may continue … Continue reading

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Simple Clock and Reset Support in SVUnit

In a post a couple weeks ago called Sorry Design Engineers, I Can Do Better, I told design engineers that I’d do a better job of giving them what they need to unit test their RTL. I felt like I’ve … Continue reading

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SVUnit for Chip Leads and Managers

Advanced verification methods put chip leads and managers at a real disadvantage, especially when it comes to visibility and predictability. With long testbench development times, early progress in constrained random is essentially based on trust; being random, the inherent uncertainty makes predictable … Continue reading

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Sorry Design Engineers, I Can Do Better

There were a lot of highlights from DVCon when it comes to SVUnit. In fact, it was the most successful three day stretch I’ve had in a very long time. From verification engineers in particular, it was the first time I had … Continue reading

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Join the SVUnit User Group

One suggestion that came out of the SVUnit User Group Lunch last week during DVCon was a mailing list so that SVUnit users could keep in touch with questions, etc. Sounded good to me so I’ve set up an SVUnit User … Continue reading

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2 Great Days for SVUnit

The last 2 days at DVCon have been about the best possible for SVUnit. Maybe even better than that. First was the poster sessions on Tuesday just before lunch. Josh Rensch and I had a paper called Do You Verify … Continue reading

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