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Here’s some information about a second agile hardware session at DAC in San Francisco. On June 8th at 5pm, you’ll find me and Harry Foster of Mentor Graphics in the Verification Academy booth talking about An Agile Evolution in SoC Verification. Here’s … Continue reading
Good news and better news… The good news is that I’ll be part of an agile hardware panel discussion at DAC this year in San Francisco. The discussion happens at 10:30am on June 9th at the Moscone Center and it’s happening thanks … Continue reading
On Friday I decided I could use a break from the blog so I’m going to step away for a bit. Not exactly sure for how long, but it might be a while. Or maybe not. We’ll see. Meanwhile, you’ll … Continue reading
Heads-up that I just posted my end-of-conference summary of the Agile2014 conference in Orlando. In short, it was a great conference with some very promising signs for agile hardware. You can read my full report here. -neil
I’ve often heard the statement that hardware developers follow a more disciplined development process than software developers. What I haven’t heard much about is what it means to be disciplined and/or why that’s the case. So let’s open that discussion in hopes it … Continue reading
In the DVCon abstract I submitted last month, I mentioned a new verification component called the uvm_boat_anchor. The uvm_boat_anchor is top-secret development so not much was known at the time about this new component, even by me. For the abstract, … Continue reading
I don’t normally need much motivation to try something new on AgileSoC.com. So at the first sign people were interested in the idea of adding a forum to help facilitate discussion between hardware and software developers, I went ahead with … Continue reading
This may be a good idea… it also may be a terrible idea. Either way it’s worth a shot. You’ve heard of take your kid to work? Well, this is kind of like that except the kid is a hardware developer.
DVCon call for papers hit my inbox last week. This time around, to possibly save myself the effort, I figured it might be more productive to let other people decide whether or not mine is a topic they’d like to see … Continue reading
Through the hardware industry’s continuing infatuation with leading verification technologies – constrained-random verification, functional coverage, numerous fancy methodologies, intelligent testbenches and a host of others – the needs of designers have been thoroughly ignored. That changes with MiniTB.