Category Archives: Functional Verification

Verilog/VHDL Mixed Language Unit Testing

SVUnit supports mixed language Verilog/VHDL unit testing. Finally. It didn’t take much to do it but for some reason it took me a loooooooong time to get at it. It involves a new switch to the runSVUnit command line. Users can … Continue reading

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One and One Makes Three

-neil PS: Huh??

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Hardware Bugs Need to Die

I used to accept bugs as a part of what happens in hardware development. Start a new project, write a bunch of code, deal with the bugs that inevitably arise, stress out about whether I can fix them before development … Continue reading

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Leading the Discussion on Unit Testing

About a month has passed since the great unit testing discussion in the Verification Academy booth at DAC in Austin. It was my second year in the booth. Very grateful for having had the opportunity. It was a lot of fun! … Continue reading

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5 Steps to Unit Testing Success

Seeing unit testing catch on and flourish with a new team has made the last few months at work pretty fun for me. Getting to this point, though, has been a ton of work. Considering the journey toward unit testing can … Continue reading

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Simple Clock and Reset Support in SVUnit

In a post a couple weeks ago called Sorry Design Engineers, I Can Do Better, I told design engineers that I’d do a better job of giving them what they need to unit test their RTL. I felt like I’ve … Continue reading

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SVUnit for Chip Leads and Managers

Advanced verification methods put chip leads and managers at a real disadvantage, especially when it comes to visibility and predictability. With long testbench development times, early progress in constrained random is essentially based on trust; being random, the inherent uncertainty makes predictable … Continue reading

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Join the SVUnit User Group

One suggestion that came out of the SVUnit User Group Lunch last week during DVCon was a mailing list so that SVUnit users could keep in touch with questions, etc. Sounded good to me so I’ve set up an SVUnit User … Continue reading

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SVUnit Training on Verification Academy

We’ve hit a notable day in SVUnit history today with an hour training course going live on Mentor’s Verification Academy. An Introduction to Unit Testing with SVUnit is a 5 part video course. It starts with my opinions on how advanced verification methods … Continue reading

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SVUnit Improves Support for UVM

Version 3.8 of SVUnit, just released, improves support and usability for people unit testing UVM components. But before we talk about new features, I want to mention that the cool part of this release… for me anyway… is that I didn’t have to … Continue reading

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