Monthly Archives: June 2012

SVUnit 101 For Designers

If you read my last post, Why Use SVUnit?, you’ll see that someone responding to my announcement about SVUnit v0.1 on verificationguild.com pointed out that I haven’t done an outstanding job of explaining why people would actually use SVUnit. Seems the … Continue reading

Posted in Functional Verification | Tagged | 2 Comments

Why Use SVUnit?

I recently came across the following comment on verificationguild.com in response to my posting of a link to the first publicly available, v0.1 version of SVUnit… I have attempted to read each of the blog posts about svunit, but they are … Continue reading

Posted in Functional Verification | Tagged | 1 Comment

SVUnit And The Moment Of Truth

SVUnit isn’t just for early adopters anymore! Anyone can download and start using SVUnit to do TDD of complex ASIC and FPGA designs. For more info on getting and using SVUnit, go to the SVUnit home page. Bye-bye SVUnit development… … Continue reading

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TDD Applied To Testbench Development

When we were writing about TDD back in November 2011 during our TDD month, admittedly I had very little experience with it. The goal with TDD month was to spread the word and drum up a little interest in a … Continue reading

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